ENGINEER, PACKAGE DEVELOPMENT ENGINEERING, PACKAGE SILICON INTEGRATION

As an Engineer, Package–Silicon Integration in Micron’s Package Development Engineering (PDE) organization, you will begin your career as a technical contributor supporting NAND package and silicon integration for next‑generation memory products.

In this role, you will work closely with experienced engineers across silicon design, wafer fabrication, package design, and assembly teams to learn Micron’s technology development processes, contribute to defined engineering tasks, and support execution of package–silicon integration activities. You will operate with close guidance and mentoring, building foundational technical skills while contributing to team objectives.

This position is designed for early‑career engineers and provides structured exposure to semiconductor packaging, integration risks, and cross‑functional collaboration within a high‑volume manufacturing environment.

Key Responsibilities

• Support chip‑package interaction (CPI) assessments by collecting data, performing basic analysis, and documenting results under guidance from senior engineers.

• Assist package design, scribe design, and assembly engineers in investigating wafer dicing, singulation, and integration topics.

• Participate in DFMEA / PFMEA activities by helping prepare inputs, reviewing risk items, and tracking action items.

• Work with wafer fab, R&D, and manufacturing teams to support yield, quality, and manufacturability issue investigations.

• Support execution of test vehicles and DOEs, including data collection, basic analysis, and report preparation.

• Learn Micron’s package and silicon development flows, design rules, and change‑management processes.

• Prepare technical documentation and presentation materials for design reviews, project updates, and knowledge sharing.

• Escalate technical issues and risks promptly and seek guidance when encountering unfamiliar problems.

Required Qualifications

Education & Experience

• Bachelor’s or Master’s degree in Engineering
  (Mechanical, Materials Science, Electrical, Chemical, or related discipline).

• < 2 years of relevant experience, including internships, co‑op programs, or research experience in semiconductor, materials, or manufacturing fields.

Technical & Professional Skills

• Fundamental understanding of semiconductor manufacturing and/or packaging concepts (coursework or internship level).

• Exposure to structured problem‑solving methods (FMEA, DOE, data analysis) through academics or internships.

• Ability to follow defined engineering procedures, analyze straightforward technical problems, and learn from feedback.

• Strong attention to detail and willingness to learn new tools, processes, and technologies.

• Basic proficiency in Microsoft Excel, Word, and PowerPoint for data analysis and documentation.

• Good written and verbal communication skills, with the ability to collaborate effectively in a team environment.